Classes | |
| struct | Instance |
Typedefs | |
| using | Walk = signal::CartesianWalk |
| using | Grid = std::array<float, static_cast<std::size_t>(Walk::kMaxDim * Walk::kMaxDim)> |
Functions | |
| Grid | default_grid () |
| The default grid: a rising chromatic ramp in volts, so an unconfigured node walks an audible, obviously-ordered sequence rather than silence — which makes "is this thing clocked at all" answerable by ear. | |
| float | cartesian_walk_worst_case_gain () |
| Worst-case linear gain for the Forge registry (series law 8). | |
| float | cartesian_walk_cv_bound_v (const Grid &grid) |
| Largest absolute CV, in volts, the node can emit for a given grid. | |
| CustomNodeType | make_cartesian_walk_node (Grid grid=default_grid(), bool row_major=false) |
| grid is the composed pattern and row_major is the access topology — the latter picks the registered type id, because it changes whether input port 1 is read at all. | |
| ForgeNodeDescriptor | descriptor () |
Variables | |
| constexpr const char * | kTypeId = "sequencing.cartesian_walk" |
| Independent X and Y — the documented René behaviour, and the default. | |
| constexpr const char * | kRowMajorTypeId = "sequencing.cartesian_walk_row_major" |
| Row-major — an X wrap carries into Y, and the Y clock port is not read. | |
| constexpr state::ParamID | kRun = 1 |
| constexpr state::ParamID | kGridW = 2 |
| constexpr state::ParamID | kGridH = 3 |
| constexpr state::ParamID | kXOffset = 4 |
| constexpr state::ParamID | kYOffset = 5 |
| using pulp::host::sequencing::cartesian::Grid = std::array<float, static_cast<std::size_t>(Walk::kMaxDim * Walk::kMaxDim)> |
| float pulp::host::sequencing::cartesian::cartesian_walk_cv_bound_v | ( | const Grid & | grid | ) |
Largest absolute CV, in volts, the node can emit for a given grid.
| float pulp::host::sequencing::cartesian::cartesian_walk_worst_case_gain | ( | ) |
Worst-case linear gain for the Forge registry (series law 8).
As with stage_seq: the clock and reset ports are consumed as edges, the CV output comes from the baked grid, and the gate and end-of-cycle outputs are boolean levels. No input amplitude reaches an output.
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The default grid: a rising chromatic ramp in volts, so an unconfigured node walks an audible, obviously-ordered sequence rather than silence — which makes "is this thing clocked at all" answerable by ear.
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| CustomNodeType pulp::host::sequencing::cartesian::make_cartesian_walk_node | ( | Grid | grid = default_grid(), |
| bool | row_major = false ) |
grid is the composed pattern and row_major is the access topology — the latter picks the registered type id, because it changes whether input port 1 is read at all.
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Row-major — an X wrap carries into Y, and the Y clock port is not read.
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inlineconstexpr |
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inlineconstexpr |
Independent X and Y — the documented René behaviour, and the default.
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inlineconstexpr |
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inlineconstexpr |